2. The big picture: the design flow in gEDA.
In EDA, the concept of “design flow” is important. GEDA is a suite of tools used to do electronic design -- it is not a single application. “Design flow” refers to the order in which you use the tools to acheive your goal. Depending upon whether you are doing analog or digital design, designing boards or chips, the type of files required by the manufacturer of your boards, and a number of other factors, you will use different tools from the gEDA suite to acheive your goal.
A flow diagram of the gEDA design flow is shown in the figure below. The diagram shows a simple flow suitable for designing, simulating, and laying out PC boards. As can be seen, the simulation activitiy (blue blocks) is a loop. That is, you create your design and simulate it repeatedly until it behaves according to your desired specifications.
The design flow used in gEDA. Shown under "simulation" are several different types of simulator available. In this HOWTO, we are interested only in the SPICE variants (e.g. ngspice, tclspice).
2.1. Overview of SPICE usage with gEDA
Conceptually, SPICE simulation in gEDA proceeds via the following steps:
Creation and gathering of schematic symbols and SPICE model files. Often, the SPICE model files are obtained from your component vendor. You can generally find most models by checking the component vendor's website.
Schematic capture using symbols and SPICE models created in step 1.
Netlist generation from the schematic created in step 2.
SPICE simulation of the circuit described by the netlist created in step 3.
These steps are illustrated by the blue boxes in the flow diagram above.
To create a SPICE netlist, the netlister (gnetlist) iterates through the entire schematic and looks at several parts of each component's symbol in order to create a blob of SPICE code. In general, each component can generate one or more lines of SPICE code. Component information needed by the netlister is held in two places:
The symbol itself, in the device attribute, which is attached when the symbol is created, and is typically accessed through the symbol editor.
In attributes manually attached to the component during schematic capture using gschem.
Since there are two places the netlister looks for information, you must make sure that the required information is available in both places.
2.2. Detailed design/simulation flow summary
The detailed steps required to design and simulate a circuit using gEDA look like this:
Schematic symbol creation with correct device attribute. (Usually, the symbols have already been created with the correct device attribute, but if you are having problems, it doesn't hurt to check them.)
Schematic capture using gschem.
Assignment of SPICE attributes (value, model, file, type, etc.) to components using gschem or gattrib.
Assignment of refdes using e.g. refdes_renum.
Creation of netlist using: gnetlist -g spice-sdb.
Check netlist for correctness (manually open and inspect netlist).
Run spice using a simulator such as LTSpice, ngspice, or tclspice.
Plot/analyze results (often plotting/analysis tools are incorporated in the simulator).
If you are not happy with your circuit's performance as revealed by simulation, go back to step 2, fix it using gschem and iterate.
The purpose of this HOWTO is to provide the detailed understanding necessary to successfully navigate this process.